[Milkymist-devel] Placements

[Sébastien Bourdeauducq]

Hi,

Good job! Just a few comments:

>2, FPGA's most decoupling capacitors are located underneath fpga (bot side).
Does this imply we have to use blind vias? Is the PCB manufacturer OK with 
that?

> 3, J3 is the extension one, I am thinking that place it to be your
>  original location nearby board edge.

This is not mandatory. Typically J3 would connect to a cable and not be 
accessible directly from outside the case... and it's only intended for 
"advanced" users. You can place it wherever it makes your job easier.

> 4, The board out line now is likely square one. (150mm * 125mm)

Ok.

Other points:
* Do you think the SDRAM is close enough to the FPGA? In [1] Micron recommends 
2 inch (5cm) total maximum track length for systems that use series 
termination only. However, I know some designs which works apparently without 
meeting this requirement, the OLPC XO for example. Are you able to perform 
IBIS simulations?
As I said in my first email, serpentine traces won't be needed: we'll use the 
IODELAYs instead, which do not pose their signal integrity issues.
* The MicroSD connector should be placed near the JTAG and UART connectors so 
that it is accessible through a single door when the board is cased. It should 
not be placed near the board edge. This model opens on the top and the MicroSD 
card is laid on it by the user (not slided into it) then the connector is 
closed to make the contacts.

Thanks,
Sébastien

[1] http://download.micron.com/pdf/technotes/DDR/tn4614.pdf