[Milkymist-devel] QEMU/LM32

[Michael Walle]

Hi Fabrice,

thanks for your reply.

Am Thursday 04 March 2010 18:54:06 schrieb Fabrice Bellard:
> Hi,
> > A few points need to be sorted out before the merge is done:
> > - Michael is unsure about the interrupt handling. Esp. if it is
> > possible to manipulate env->interrupt_request within a translation block.
> > Could you check that?
>
> The following code in the PIC is almost surely incorrect:
>
>      if ((env->ie & IE_IE) && (env->ip & env->im))
>          cpu_interrupt(env, CPU_INTERRUPT_HARD);
>
> CPU_INTERRUPT_HARD means that a hardware interrupt is pending. When it
> is set, QEMU will exit the current translated block as soon as possible.
> You should not test the CPU irq masking state before setting it
> otherwise the CPU will miss interrupts.
>
> The code should be something like that:
>
> if (env->ip & env->im)
>          cpu_interrupt(env, CPU_INTERRUPT_HARD);
> else
> 	cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
>
> In cpu-exec.c you should do:
>
> if ((interrupt_request & CPU_INTERRUPT_HARD)) && (env->ie & IE_IE)) {
>    [...]
> }
>
> (Testing (env->ip & env->im) is not necessary because CPU_INTERRUPT_HARD
> gives its state).
>
> You should also remove helper_update_interrupt().

The LM32 interrupt controller is integrated into the LM32 core. It is 
controlled by that three registers (ie, im, ip) above. These registers are 
set with a special opcode.

The main problem i had:
  An interrupt is pending, but its masked. Then the program executes a write
  to the interrupt mask register (remember its a special opcode), which
  then should trigger an interrupt. (same with interrupt enable bit)

Thats the reason for that op helper above, which gets called after an update 
to IE or IM.

> > - Support for the variants of LatticeMico32 (with/without barrel shifter,
> > multiplier and divider) is missing.
>
> You should use "cpu_model" in cpu_lm32_init() to handle CPU model options.
ok

-- 
wkr,
 michael