[Milkymist-devel] VCOMP problem with blocking assignments

[Sébastien Bourdeauducq]

Hi Paul,

I'm not sure if you are still maintaining VCOMP [1], but I'm trying to use it 
to debug the texture mapping unit in Milkymist [2], an open source hardware 
SoC with 2D acceleration. Being a "compiled" simulator, I hope it would bring 
speed advantages over GPL Cver that I'm currently using (full simulations of 
the texture mapping unit typically take several minutes on a fast machine).

I have noticed two problems:

* most importantly, blocking assignments sometimes do not work as expected, 
for example in the following code excerpt:

		correct = (err[16:0] > {1'b0, divisor_r[16:1]}) & ~err[17];
		if(positive) begin
			o = o + {1'b0, q_r}; // A
			if(correct)
				o = o + 18'd1; // B
		end else begin
			o = o - {1'b0, q_r}; // A'
			if(correct)
				o = o - 18'd1; // B'
		end 

If correct evaluates to true, then only lines B or B' are taken into account 
(not A and A'), yielding a wrong value for o (only incremented/decremented by 
1 while it should _also_ be added/subtracted {1'b0, q_r}). I am attaching the 
full source code that provokes the problem.

* VCOMP does not support the Verilog-2001 syntax "output reg signed" in module 
port declarations.

Thanks for any feedback,
Sébastien

[1] http://vcomp.sf.net
[2] http://www.milkymist.org
-------------- next part --------------
A non-text attachment was scrubbed...
Name: tmu2_geninterp18.v
Type: text/x-csrc
Size: 1549 bytes
Desc: not available
URL: <http://lists.milkymist.org/pipermail/devel-milkymist.org/attachments/20100208/def89cab/attachment.c>