[Milkymist-devel] DDR2 SDRAM (was: about LM32 onchip debug)

[Sébastien Bourdeauducq]

On Sunday 20 September 2009 22:46:34 Sébastien Bourdeauducq wrote:
> A good document about the DDRx SDRAMs:
> http://www.techonline.com/article/pdf/showPDF.jhtml?id=2078010911

By the way, HPDMC with DDR SDRAM:
- does not align write DQS with the clock (it seemed there were enough margins 
to avoid this complexity, but I might be wrong as people experience problems 
with this). It aligns data instead and shifts DQS.
- ignores read DQS. Instead, it registers data on the clock edges and inserts 
a variable delay on each input so that you can tune the timings to align the 
center of the data eye with the clock.